1. Field of the Invention
This invention relates to a semiconductor stack and more particularly relates to a semiconductor stack composed of a positive switching device and a negative switching device in which two terminals of the positive side and the negative side thereof are led to the same surface.
2. Description of the Related Art
Currently, the high-frequency pulse width modulation (PWM) control method which uses high-speed switching devices is being widely used in power converters. As the capacity of the power converter is made larger, large capacity high-speed switching devices are being used in parallel. Also, in the high-frequency PWM control method, in order to suppress surge voltage generated during switching by reducing the reactance between high-speed switching devices, the high-speed switching devices are installed close to each other and their distance from the capacitor is shorter.
A prior art semiconductor stack is described below with reference to FIGS. 10, 11(a), and 11(b).
FIG. 10 shows a circuit construction of a semiconductor stack 7 composed of the two arms of the positive side and negative side of a given AC phase in a three-phase or single phase bridge circuit. In this circuit, 6 parallel semiconductor switching devices 1a, 1b, 1c, 1d, 1e, 1f and 6 parallel semiconductor switching devices 2a, 2b, 2c, 2d, 2e, 2f, each composed of a transistor, are connected in series between DC terminals 9 and 10. Also in this circuit, two capacitors 15 are connected between DC terminals 9 and 10. Devices 1a-1c are connected in parallel between a DC conductor 3H and an AC conductor 5H. Devices 1d-1f are connected in parallel between a DC conductor 3R and an AC conductor 5R. Devices 2a-2c are connected in parallel between AC conductor 5H, and a DC conductor 4H. Devices 2d-2f are connected in parallel between AC conductor 5R and a DC conductor 4R. An AC terminal 11 is led from AC conductors 5H, 5R. The connection between capacitors 15 and DC terminals 9 and 10 is carried out by DC conductors 3a and 4a, respectively.
FIGS. 11(a) and 11(b) show the packaging of prior art semiconductor stack 7 shown in FIG. 10. FIG. 11(a) is a plan and FIG. 11(b) is a right side elevation.
In FIG. 11(a) and 11(b), devices 1a-1f and 2a-2f are arranged, six to each face, on the two faces of a heat receiving unit 6a of a heat sink 6 with a built-in heat pipe. Devices 1a and 2a, devices 1b and 2b, and devices 1c and 2c are arranged in sequence on the front surface of heat receiving unit 6a of heat sink 6 from a heat radiation unit 6b side. Positive terminals C of devices 1a, 1b and 1c are each connected to DC conductor 3H which is extended from near heat radiation unit 6b of heat sink 6. DG conductor 3H is connected to DC conductor 3a through DC terminal 9. Negative terminals E of devices 1a, 1b and 1c and positive terminals C of devices 2a, 2b and 2c are each connected to AC conductor 5H which is extended from near heat radiation unit 6b. The end of AC conductor 5H forms AC terminal 11. Negative terminals E of devices 2a, 2b and 2c are each connected to DC conductor 4H which is extended from near heat radiation unit 6b. DC conductor 4H is connected to DC conductor 4a through DC terminal 10. The other ends of DC conductor 3a and DC conductor 4a are respectively connected to the positive terminals and the negative terminals of capacitors 15.
Also, devices 1d and 2d, devices 1e and 2e, and devices 1f and 2f are arranged in sequence from heat radiation unit 6b side on the rear surface of heat receiver 6a of heat sink 6 in the same way as for the front surface. Positive terminals C and negative terminals E of these devices are connected to one of two DC conductors 3R and 4R and AC conductor 5R in the same way as for the front surface. As shown in FIG. 11(a), AC terminal 11 is arranged in a position close to and equidistant from DC terminals 9 and 10. Also, each of conductors 3H, 3R, 4H, 4R, 5H and 5R is formed in a belt shape, as shown in FIG. 11(a) and 11(b).
In FIG. 11(b), only DC conductors 4H and 4R and DC conductor 4a are shown. A DC conductor is composed by DC conductors 3H and 3R; a DC conductor is composed by DC conductors 4H and 4R; and an AC conductor is composed by AC conductors 5H and 5R.
As shown in FIG. 11(b), each of the DC conductors 3H, 4H, 3R and 4R and AC conductors 5H and 5R positioned on the front and rear faces of heat receiving unit 6a is respectively bent toward the end surface of heat receiving unit 6a at the front of heat receiving unit 6a. DC terminals 9 and 10 and AC terminal 11 are arranged at intermediate positions of DC conductors 3H and 3R, DC conductors 4H and 4R, and AC conductors 5H and 5R, respectively.
However, in this type of composition in which AC conductors and DC conductors are arranged three-dimensionally by making them belt-shaped and dividing them, there is a limit to making the wiring reactance of the circuit smaller and to suppressing surge voltages during the switching action of each device.
There is also an imbalance between currents flowing through each of devices connected in parallel caused by the difference between the distances from each of the devices to DC or AC terminal.